The IBM RT PC
IBM RISC before POWER
In 1986, IBM released a RISC workstation that featured the IBM ROMP CPU and 1MB of RAM standard which could be expanded to 16MB. This was the IBM RT PC. This computer was primarily used as CAD/CAM machines, in scientific and educational venues, as POS terminals, as machine shop control systems, and as terminals to IBM mainframes. It was not much of a success in retail terms, but innovations that originated in this product’s research and development are with us to this day. The RT PC was also the first commercially available RISC machine.
I would like to note that there are some conflicting sources regarding the RT and the ROMP, and therefore I have tried to err on the side of sources contemporary to the release of the machine when I encountered these conflicts. To that end, I have treated IBM’s announcements and material as the most trusted, and BYTE magazine as the second most trusted.
The machine was featured on Computer Chronicles, and interestingly there was a bit of intelligent and technically sound discussion around the machine.
The 801 Minicomputer
The IBM RT PC was truly birthed at IBM Research Division in 1975 as the IBM 801 Minicomputer. The 801 was named after the building in which it was conceived: Building 801 of the IBM T.J. Watson Research Center in Yorktown Heights, New York. Reminiscent of current work with RISC-V, the researchers in 1975 realized that the vast majority of compute tasks utilized a rather small number of instructions. This being the case, why not build a machine that was simple and really tried to get those few instructions to be as efficient as possible? Beyond being an early RISC design, there was also the goal of completing one full instruction per clock cycle.
To achieve this, all arithmetic and logic instructions operated on the contents of registers, and there were no add to memory, move memory to memory, or similar instructions. Instead, simpler addressing functions had to be used when dealing with memory, such as base plus displacement or base plus index. There wasn’t even full multiply, but rather just Multiply Step.
All of this was further enhanced by an optimizing compiler that IBM built for this machine which was called PL.8, a dialect of PL/I. While many iterations of the 801 were made, the final design had thirty-two 32-bit registers and 4-byte instructions. Quite a bit of effort was spent to keep throughput high, and this was largely successful: 15.1 million instructions per second, a cycle time of 63 nanoseconds resulting in 1 cycle per instruction (roughly).
The ROMP Microprocessor
Not long after the development of 801 (1977), the IBM Office Products Division wanted to put the 801 into a microprocessor. The result of this was the Research Office Products Division Microprocessor, ROMP. There were compromises made in this chip’s design. In the 1970s, the number of busses present in a minicomputer, the large caches (for the time), and the high number of registers (for the time) were simply too costly and too large for the VLSI of the day. Having all of your instructions be exactly one word long is awesome for instruction decoding simplicity and speed, but if you’re limited to a single memory bus that is itself one word wide, this becomes problematic. Variable length instructions became necessary, 2 byte and 4 byte. Register series load and store instructions also became necessary, as this would allow for the full bus width to be used for data transfer. Obviously, this violates the one instruction per clock rate of the 801. So… we are now saying that most instructions on the ROMP are one cycle.
Bits are numbered left to right, high order to lower order, 0 to 31. The ROMP does have 32 registers. All of the 16 general purpose registers are equivalent and can be used for any purpose. There are also 16 system control registers. As for the instructions, there are 118 instructions on the ROMP. This sounds like a lot (for a RISC ISA), but as I described previously… much of this was due to the limits of what was possible at the time. These 118 instructions can be roughly divided into groups:
73 computational and register transfer
7 system control
The ROMP has a 32-bit word, and memory is addressed at the byte level. Memory alignment on word boundaries is required.
From BYTE 1986 Extra Edition, page 58
The fundamental unit of memory is the 32-bit word, and all memory operations involve 32-bit words. The words are further subdivided into halfwords and bytes. Memory is addressed by byte address, and words and halfwords are required to be on appropriate boundaries. That is, a word address must be a multiple of four, and a halfword address must be a multiple of two.
While the work on ROMP started in ‘77 the first chips were made in ‘81. This delay was caused by multiple design revisions and multiple models in the course of development having been made in TTL. The delay from the chip in ‘81 to public release in ‘86 was apparently due to software ambitions (according to Mike Johnson who was the first member of the ROMP design team).
While the machine was visually familiar and somewhat similar to the AT, the internals of the machine were quite a bit different.
First, the CPU and memory were on a card the plugged into the motherboard, which was mostly a backplane. There were three variants of the CPU card:
1MB of RAM
Expandable to 16MB with extra memory cards
Optional floating point accelerator board featuring NS32081 @ 10 MHz
4MB of ECC RAM
Motorola 68881 FPA
Optional Advanced FPA card contained an ADSP-3220 FP multiplier and an ADSP-3221 FP ALU by Analog Devices
16MB of ECC RAM
Advanced floating point accelerator as standard
Rated by IBM at 5.6 MIPS
The RT had an MMU that provided address translation, a translation lookaside buffer, a store buffer, ECC, and 1TB max of virtual memory. The MMU was also designed within IBM.
As far as I can tell, there were two versions: floor-standing 6150, desktop 6151.
The 1987 models were slightly upgraded. Most notably to me was the transition to 1μm CMOS for the CPU.
In addition to the four 32-bit system card slots, the RT also featured two 8-bit ISA bus compatible expansion slots, and six 16-bit ISA bus compatible expansion slots.
In 1986, the RT was available with a 210 megabyte disk, in 1987 it was 581 megabytes, and in 1988 it was 746 megabytes.
The RT ran AIX, which in this early state was a port of UNIX System V with enhancements from BSD 4.2 brought over. There was also an expansion card available for the machine that featured an Intel 80286, and it would allow the use of software for MS-DOS and the IBM PC/XT/AT line. This 286 board would take one of the 16-bit ISA slots.
The X Windows system was ported to AIX on the RT; specifically version 9. Thing is, the ROMP requires memory alignment on words. This required a fundamental change to X resulting in X Windows version 10.
Further, AIX on the RT used a microkernel to control the keyboard, the mouse, the display system, the disks, and NIC via the Virtual Resource Manager (VRM). This allowed multiple operating systems to be used concurrently, and it is this innovation that enabled that 80286 card running MS-DOS. Similar cards had been made in the past for the Apple ][, and similar cards would be made later for Macintosh systems, but none of those worked in quite this way.
Effectively, in 1986, a person could be running a networked UNIX system, on a 32-bit RISC computer, with MS-DOS applications intended for 16-bit x86 running at the same time, and he/she could switch applications via alt+tab in the graphical environment of X Windows version 10. That sounds really modern doesn’t it?
Ultimately, the RT is mostly forgotten today, and this is largely due to cost vs performance at the time it hit the market. The late 80s and early 90s were largely the time that PC compatibles were completely devouring the computer market. This accelerated when the 80386 came out and Windows 3 shipped with the ability to take advantage of that 386. With that combination right around the corner, the RT was dead on arrival.
Yet, the 801, the ROMP CPU, and the RT PC were not dead ends. IBM continued to work on RISC architecture and created the POWER architecture, variants of which are available to this day. The RT was also IBM’s first public adventure with UNIX. I already mentioned the RT pushing X forward, but there is one more major event that involved the RT. The IBM RT PC line were used within the National Science Foundation Network (NSFNET) as packet switching hubs for the network.
Like so many artifacts of technology history, the RT fascinates with what might have been.