This article continues a lengthy series. You may be interested in the start of silicon valley, Fairchild, the founding of Intel, the start of the x86 architecture, Intel’s pivot to become a processor company, the i960 and i486, the Intel Inside campaign, the FDIV bug and the Pentium Pro, MMX, the Pentium II, and the Pentium III, and Pentium M.
By the start of 2004, Intel had research and development operations in over twenty countries, marketing programs in over twelve hundred cities, and they opened Fab24 in Ireland, the first Intel 300mm wafer fab outside of the USA.
In February of 2004, Intel announced Pentium 4 parts fabricated on a 90nm process. These parts doubled L2 cache to 1MB, L1 cache to 16K, added SSE3, clocked as high as 3.8GHz, and were built of 125 million transistors. The Pentium 4 Extreme Edition of this revision provided 2MB of L3. These chips also extended the pipeline to 31 stages from 20. These changes meant that the refreshed Pentium 4s were better in some workloads and worse in others, but other changes helped mitigate the performance losses. These new Pentium 4s were the first CPUs to launch on socket LGA775, and the chipsets for these processors supported DDR II, an 800MHz bus, Intel HDA, and PCI Express. Intel would remain competitive with AMD not for its CPUs having been superior, they weren’t, but because Intel could deliver consistent quantity. On every 300mm wafer, Intel was able to produce 588 Pentium 4s, while AMD could produce just 148 Athlon 64s on their 200mm wafers. Adding to this that AMD had fewer fabs and larger geometries, Intel was the only company capable of producing microprocessors in sufficient number for the largest PC vendors, and they could do so with surprisingly good yields, pricing, and consistency.
Following the Pentiums in May, Intel moved the Centrino platform to 90nm, and the 2200BG wireless chip became the default. Even the prior Centrino on 130nm outperformed the Pentium 4 Mobile while offering superior battery life, and the 90nm revision sped the adoption of the platform. This was an increasingly important product line as laptops were beginning to become more common. With Centrino, Intel had increased performance, increased efficiency, and lowered costs for practical mobile computing, and the market was responding.
In June of 2004, Intel launched Xeon processors with EM64T (Extended Memory 64bit Technology, or Intel’s equivalent of AMD64), hyperthreading, PCI Express support, SATA support, an 800MHz bus, and DDR2 support. These were built using the same 90nm process of the Pentium 4s of this era, and while they didn’t beat Opteron in most workloads, they remained competitive and were available in higher quantities.
Throughout the year, significant advancements made available from Intel’s fabrication improvements came to Intel’s flash memory products, XScale ARM products, chipsets, network controllers, and media accelerators. Just as an example, the XScale PXA27x was available with clocks from 312MHz to 624MHz with 64MB of on-package StrataFlash, and could be paired with the 2700G multimedia accelerator providing video and graphics capability to handhelds. Network controllers were available supporting everything from 10Gbps ethernet to Wireless A, B, and G in a single chip.
By the end of the year, Intel’s headcount was 85,000, and total assets were $48 billion. The company had income of $7.5 billion on revenues of $34.2 billion, and had spent $4.7 billion on R&D and $3.8 billion on property and equipment. In January of 2005, global semiconductor sales were reported for 2004 to have hit $213 billion which was a 28% increase over 2003. By itself, Intel accounted for more than 20% of the global semiconductor market.
On the 14th of February in 2005, Intel shipped updated Xeons clocked at 3.6GHz and 1MB of L2 or 2MB of L2. These were Intel’s moment to regain the datacenter performance crown. In a majority of workloads for which I was able to find reliable benchmarking Xeon was roughly 10% to 40% faster than Opterons launched at the same time. There were some SQL Server benchmarks I saw, however, where Xeon did lose. These were largely when working with the largest of datasets. Overall, however, even with SQL Server, the Xeon was likely the better choice offering a higher averaged number of queries per second.
On the 20th of March in 2005, Intel’s answer to Athlon 64 finally shipped. The Pentium 4F 600 series was built on a 90nm process with 2MB of L2 and an 800MHz FSB. These were the 630, 640, 650, and 660 clocked at 3GHz, 3.2GHz, 3.4GHz, and 3.6GHz respectively. All four SKUs sported enhanced SpeedStep for power management, SSE3, execute disable bit, DDR2 memory support, and EM64T, and all of these new CPUs were made for the LGA775 socket. These parts had a TDP of 113W. A final SKU, the Pentium 4 Extreme Edition of this generation, was roughly the same but clocked up to 3.73GHz with a 1066MHz bus and a TDP of 230W. Prices ranged from $224 for the 630 to $999 for the P4EE. That $999 price tag is roughly equivalent to $1632 in 2025 dollars. When compared against the Athlon 64 400+ the 660 was exceptionally close in some tests and won in others, and it generally performed better in multitasking.
Intel announced the Pentium D on the 18th of April in 2005. This was the first dual core x86 chip (PPC was first more generally) for the mass market, and became available on the 25th of May (just six days ahead of the Athlon 64 X2). The first Pentium D was a NetBurst microprocessor built of 176 million transistors on a 90nm process for socket LGA775. These chips had 1MB of L2 per core for a total of 2MB, and otherwise supported XD bit, EM64T, enhanced SpeedStep, SSE3, DDR2, an 800MHz FSB, and clock speeds ranging from 2.8GHz to 3.2GHz. With the Pentium D, the highest SKU part was the Pentium Extreme Edition. Unlike previous Extremes, it didn’t have more cache, but instead added hyperthreading and thus presented four logical cores to the OS. While the Pentium D was a great product and offered great performance at a reasonable price of $241 to $530, most software of the time wasn’t multi-threaded. As such, the gains were mostly felt in multitasking as had been the case with single core hyperthreaded Pentium 4s. Beyond these performance considerations, another factor limiting the appeal of these early Pentium Ds was the need for a motherboard with either the nForce 4 SLI IE, i945, i955, i965, or i975 chipset.
On the 4th of May in 2005, Intel announced that Paul Otellini would be succeeding Craig Barrett as the fifth CEO on the 18th. While Otellini had been at the company for quite a while having started with Intel 1974, his accession to CEO was something of a big deal; Otellini wasn’t an engineer. Of course, he’d had quite a bit of exposure to Intel’s technologies over the years having managed the Microprocessor Products Group, Peripheral Components, Folsom Microcomputer Division, and even served as a technical assistant to Andy Grove, but he had first and foremost always been a financial analyst and marketer. Craig Barrett then became chairman, and Andy Grove became senior advisor. He was, however, an extremely accomplished man. He’d managed Intel’s business with IBM, and he’d more recently been the driving force in building a relationship with Apple.
At 13:30 Pacific on the 6th of June in 2005 at the Moscone Center in San Francisco, Steve Jobs announced that Apple would be transitioning the Macintosh to Intel CPUs with the first Intel Macs launching in 2006. Despite sprinkling some humor into this announcement, Jobs was quite honest about why this occurred: performance per watt and therefore TDP. He even stated that only Intel could offer both the compute power and efficiency that Apple needed in a laptop. As surprising as this move may have been to many at the time, it wasn’t exactly without precendent.
Back on the 14th of February in 1992, Apple had started project Star Trek with the goal of porting System 7 to the i486 (to boldly go where no Mac has gone before). This was a joint venture between Apple and Novell with support from Intel. System 7 would have run on top of DR-DOS, and while this was successful, the project faced three serious issues. First, the existing library of Macintosh software would have needed to have been ported individually to the x86 architecture. Second, the politics within Apple made this project extremely controversial. Third, when the ported System 7 was shopped around (including to IBM), there weren’t any seriously interested parties. The project was completed on time with a demo ready on the 1st of December in 1992, and the team had even made QuickDraw GX and QuickTime available. Still, when Michael Spindler replaced John Sculley as CEO at Apple, the project was terminated.
Despite Star Trek’s termination, intermittent efforts at porting OS X to Intel hardware were made. In 2001, Kunitake Ando and some other Sony executives were playing golf in Hawaii, and at the end of the course, Steve Jobs was waiting for them and holding a Sony VAIO laptop that was running OS X. Plus several points for style and minus several points for timing. Sony’s Windows powered laptops were selling quite well and the company had little reason to engage in the much smaller Macintosh market. Then, there was project Marklar that likely enabled this VAIO port. This project was tasked with compiling OS X for x86 CPUs. These were expected to be full and high quality builds. By 2002, Apple’s relationship with Motorola was becoming increasingly strained, and the company wasn’t entirely pleased with the G4. Thus, IBM’s 64bit PowerPC 970 became the G5. For this G5 CPU, Apple designed the U3 northbridge which IBM manufactured. The specifications are likely to be somewhat familiar: two 550MHz buses, DDR memory controller, AGP, 400MHz 16bit HyperTransport. The northbridge was made on a 130nm process. For the PowerMac, Apple used the U4 northbridge both designed and manufactured by IBM. This was capable of supporting two PowerPC 970MPs, with the processor buses upped to 625MHz, two memory controllers were present allowing up to 64GB of 533MHz DDR2 (ECC), and the chip supported an 800MHz 16bit HyperTransport link and PCIe. This second northbridge was built on a 90nm process. So, why this detour into PPC? Well, the U3Lite northbridge meant for laptops never saw the light of day, and a fourth northbridge design was likewise canceled. While Apple was initially pleased with the performance of the G5, even liquid cooled models were loud due to fan noise, and the company was never able to get thermals and power consumption low enough for their needs while still delivering worthwhile performance. Apple needed a solution. With Intel, they had relatively efficient chips that ran comparatively cool. Intel’s processors were offered in 64bit dual core varieties, and Intel had proven that could scale down to laptops with Centrino. These were all the ingredients that Apple had wanted.
The second half of 2005 wasn’t quite as exciting as the first half. Later in June, Intel released the Celeron D. Here, the Celeron got the EM64T treatment, speeds ranging from 2.53GHz to 3.06GHz, 256K L2, and a 533MHz bus. July saw new Itanium 2 CPUs utilizing a 667MHz bus, clocks up to 1.66GHz, and up to 9MB of L2. October saw the release of new Xeon’s supporting HyperThreading, EM64T, Intel Virtualization Technology, and up to 4MB of L2. Intel closed 2005 with income of $8.6 billion on revenues of $38.8 billion, 99,900 employees, and $48.3 billion in assets.
On the 5th of January in 2006, Intel signaled the end of NetBurst and return to the P6 (via Pentium M) with the Intel Core brand. The enhancements to the P6 to create the Intel Core microarchitecure were the addition of SSE3 support, a faster bus, better power management, more decoders (4) per core, and dual core support. Part of the dual core support came with Advanced Smart Cache which allowed a single core to utilize all available cache if needed. Power management came with Intelligent Power Capability, and this was per core power consumption monitoring and optimization. Here, Intel finally had something more comparable to Transmeta’s LongRun. Intel had also improved memory management, and provided some more optimizations for multimedia and graphics tasks. All of the new Intel Core lineup except for the Celeron M 400 supported Intel’s VT-x (virtualization technology).
The first Intel Core CPU to be released was the Core Duo. As the name would imply, it was a dual core part. The first Core Duos were built of 151 million transistors on a 65nm process with 2MB of L2, 64K of L1, and a 12 stage pipeline with a peak clock of 2.5GHz. These were strictly 32bit non-hyperthreaded parts like all preceding P6 CPUs, but they sipped power with the highest performance part at 31W and the most efficient part at 9W. The Core Duo was followed by the Core Solo which was a single core variant that otherwise followed the same specifications but itself had a variant with just a 5.5W TDP. Intel also released the Pentium Dual-Core which was similar to the Core Duo but had just 1MB of L2 and a TDP of 31W. Finally, there was Celeron with 512K or 1MB of L2, and a TDP of either 5.5W or 27W. Xeons migrated to the Intel Core microarchitecture on the 14th of March in 2006 with the Xeon Low Voltage (LV). The primary difference was support for dual socket system configuration and the addition of PAE.
Apple’s first Intel Macintoshes were released in January. The Core Duo iMac came in either 17” or 20” sizes and operating at either 1.83GHz or 2GHz respectively. The Mac Mini came in two configurations. The base model made use of a 1.5GHz Core Solo, and the beefier model used a Core Duo at 1.66GHz. The Core Solo unit was killed off later the same year. Apple shipped the MacBook Pro on the 14th of February with Core Duos ranging from 1.67GHz up to 2.16GHz. Comparing the Core Duo iMac to the G5 iMac under load (QuickTime encoding), the Core Duo system’s total power consumption was 64W while the G5 system’s was 97W. While that may not seem too severe, the performance per watt was widely different. Again with QuickTime, the Core Duo system was capable of 0.09 frames encoded per second, while the G5 achieved just 0.05.
On the 27th of June in 2006, Intel announced the sale of Intel XScale to Marvell Technology Group for $600 million. For Intel, this was part of a larger restructuring that had begun in April following a 38% drop in income. Otellini referred to this reorg as the largest shakeup since the mid-1980s. Intel did retain its Wi-Fi and WiMAX chips and its ARM license. The company also agreed to continue the manufacture of the chips for Marvell until Marvell could arrange for manufacturing elsewhere. Given that Otellini had stated that Intel intended to produce a half watt chip capable of running Windows Vista by 2010, this may not have been too surprising for those following the company closely, but in hindsight from today, it would appear that this was a grievous mistake.
On the 27th of July in 2006 at Fragapalooza, Intel firmly took back the performance crown with the introduction of the Core 2 line of CPUs for socket LGA775, and AMD’s K10 for socket AM2 released the following year wouldn’t win it back. Core 2 made the new Core microarchitecture 64bit, increased L2 to 4MB, increased the FSB to 1066MHz, and bumped the desktop TDP to 65W. The first Core 2 chip released was the Core 2 Duo. The Core 2 Extreme was released on the 29th of July replacing the Pentium Extreme Edition. The Core 2 Extreme had a clock speed of 2.93GHz with an unlocked multiplier and had a TDP of 75W. Built of 291 million transistors on a 65nm process, Intel could produce their new processors in high quantity, and the company maintained great yields. This meant that the low end E6300 at 1.86GHz with 2MB of L2 cost $183, the E6400 at 2.13Ghz cost $224, the E6600 at 2.4GHz with 4MB of L2 cost $316, the E6700 at 2.66GHz cost $530, and the Extreme X6800 at 2.93GHz with 4MB of L2 cost $999. To compete with the Core 2, AMD was forced to cut their own costs. This resulted in AMD shipping parts with 512K L2 instead of 1MB to improve yields and fit more chips on a wafer. Naturally, this also hurt the performance of AMD’s CPUs.
These two benchmarks show the Intel parts firmly beating the Athlon, but there are some situations where even the E6300 was able to best both the Athlon 64 X2-62 and the Pentium XE 965. While the parts were all announced, reviewed, and benchmarked, none of the Core 2 series saw widespread availability until the following year, though Apple did update many of their systems to the Core 2 before the end of 2006.
The Xeon lineup received the Core 2 treatment in September. These were intended for the same socket and featured the same technological features. These parts all featured a 65W TDP, had L2 cache of either 2MB or 4MB, and bus speeds of either 1066MHz or 1333MHz. Clock speeds ranged from 1.86GHz to 3GHz. These were intended for uniprocessor servers and workstations unlike most other Xeons.
Intel launched more than 40 new processor SKUs in 2006, shipped more than 70 million 65nm processors, and closed the year with $5 billion in income on revenues of $35.3 in revenue. The company had invested $17.6 billion in property, plants, and equipment, $5.8 billion in R&D, had assets valued at $48.3 billion, just $1.8 billion in long-term debt, and a total of 94,100 employees. Of this dip in income and revenue, Otellini remarked that an increase in competition and price pressure were the primary causes. The company had cut a total of 8400 jobs with more expected to follow the next year, they’d put Fab23 in Colorado up for sale, divested several product lines, and established the tick-tock strategy. Intel’s new plan was to introduce a new microarchitecture every two years with an improvement in silicon technology in each intervening year. Whatever fears people may have had in Intel appointing a non-engineer as CEO, the first year of Otellini’s reign was impressively ambitious.
In January of 2007, Intel unveiled a breakthrough that had begun in July of 2005 at Fab32 in Chandler, Arizona. When attempting to shrink to 45nm with a silicon dioxide gate dielectric (the stuff separating the silicon substrate from the gate electrode), transistors were experiencing quite a bit of gate leakage. That is, with a super thin gate dielectric, quantum tunneling effects became a problem and electrons would appear on the wrong side. The solution that Intel struck upon was the introduction of a gate dielectric with a higher dielectric constant (k), in this case, hafnium dioxide. Hafnium is around 3.12 angstroms between atoms and silicon is about 2.35 angstroms between atoms, and according to Intel their gate thickness was around five atomic layers. To us humans, intuition would say that a physically thicker gate would be a bad thing, but in this case, it really wasn’t. With a higher k, this gate dielectric was physically thicker (reducing leakage), but not electrically thicker (didn’t require more power). This, of course, introduced another problem. The hafnium dioxide gate dielectric wasn’t compatible with polysilicon gate electrodes. Thus, Intel moved from silicon gates to metal gates, and these two changes combined were termed “High-k Metal Gate.” While Intel didn’t publicly disclose the gate electrode material, it was likely niobium or tantalum for NMOS and most likely ruthenium oxide and tungsten nitride for PMOS (metal gates in PMOS are usually two layers). Intel’s 45nm process was the first die shrink for the Core microarchitecture, and its high-k metal gate technology provided a roughly 20% increase in transistor performance, reduced source to drain leakage, and reduced power consumption all without a major change to lithography.
Of course, the process shrink also allowed some more room on the processor die with 3.33 million transistors/mm², and this enabled some improvement to the microarchitecture. First, these new Core 2 processors introduced Streaming SIMD Extensions 4 (SSE4), increased the FSB speed to 1600MHz, and introduced Deep Power Down Technology (low power state C6). These new chips also introduced a redesigned divider that doubled performance. Much more of the space made available was used to increase cache sizes. Dual core parts now had a cache of 6MB and quad core parts 12MB. All of these improvements were packed into a smaller die, in the same package, for the same LGA775 socket. These processors were first announced in April, test units were out to reviewers by October, and the very first of this second generation Core 2 lineup would make it to market in November.
While announcing their new transistor technology in January, Intel also announced the Core 2 Quad and quad core Xeon series of processors. These were 65nm parts. The first was the Core 2 Quad Q6600 clocked at 2.4GHz which went on sale on the 8th of January for $851. This price was reduced in April to $530 ahead of the release of the Q6700 and the QX6850 released in July for $530 and $999, which then pushed the price of the Q6600 down to just $266. These parts were essentially just two Core 2 Duos on a multichip module. Xeons of the same general configuration were released at the same time.
On the 7th of January in 2007, Steve Jobs revealed the iPhone that made use of an ARM1176JZ-S CPU clocked at 412 MHz, PowerVR MBX Lite 3D GPU, and 128MB of RAM. Sadly, it wasn’t Intel XScale SoC. In November, Qualcomm released Snapdragon at 1GHz. Where Intel had once dominated the market for extremely low power, handheld, and embedded CPUs, it had given that market up to allow it to focus on the most powerful CPUs. The last Intel XScale product was launched in April of 2007, the Intel CE 2110 Media Processor, from Intel’s press release:
The Intel CE 2110 Media Processor includes a powerful embedded 1 GHz Intel XScale® CPU, MPEG-2 and H.264 hardware video decoders, DDR2 memory interface, 2D/3D graphics accelerators, and is supported by a modular software development environment. The platform architecture also allows CE developers and manufacturers to deliver pure IP or hybrid set top boxes designed to receive content from IP and digital broadcast pipes.
Intel’s sales of laptop parts continued growing with the Mobility Group being responsible for 38% of Intel’s revenues for the year. The mobile CPUs at this time included Core 2 Extreme, Core 2 Duo, Pentium Dual-Core, Core 2 Solo, Celeron M, and Celeron. The chipsets were the Mobile Intel 965 Express and the Mobile Intel 945 Express. These were combined with Intel WiFi to form Centrino. In the WiFi market, Intel expanded their offerings to include 802.11n based off of a draft of the specification. Apparently, Intel didn’t want to repeat being late like it was with wireless G. The company was still in the flash business with both NOR and NAND flash.
At Computex in June of 2007, Intel introduced the Intel 3 Series chipsets that would accompany their 45nm Core 2 parts. These were the G33 and G35 supporting DDR2 upto 800MHz or DDR3 upto 1333MHz, PCIe 2, HDMI, DX 10, and 7.1 channel audio via Intel HDA.
When November arrived, the world was treated to an array of 45nm second generation Core 2 (Penryn) CPUs. From the Xeon lineup built of 410 million transistors for dual core parts, and 820 million transistors for quad core parts were the E5000 series and the X5000 series. For these parts the 52xx were dual core, and the 54xx were quad core. Bus speeds started at 1066MHz and peaked at 1600MHz, and TDP started at 65W and peaked at 150W. Dual core parts had 6MB of L2 and quad core parts 12MB. For consumers, the Intel Core 2 Extreme QX9650 was made available for $999. This was a quad core part clocked at 3GHz, built of 820 million transistors, with 64K L1 per core, 12MB of L2, and a TDP of 130W. It could make use of DDR2 or DDR3 RAM in dual channel, and in competition with the earlier Core 2 Extreme, it was at minimum equivalent performance using less power, and at its greatest could offer double digit performance gains. As one would expect, more parts came the following year as 65nm parts were phased out and 45nm parts became the norm.
Intel closed the year with income of $6.9 billion on revenues of $38.3 billion, $55.6 billion in assets, $1.9 billion in long-term debt, 86,300 employees, and an extremely good market position for laptops, desktops, workstations, and servers.
From 2004 to 2007, Intel had moved from 200mm wafers to 300mm wafers, from 130nm to 45nm, from the decades old standard of silicon polysilicon gates and silicon dioxide dielectric to metal gates with hafnium dioxide dielectric, and from a lagging performane position to absolute domination. The company had consolidated its efforts on high performance computing, and they’d delivered extremely well. The company had learned its lessons on laptops, and they pushed to 802.11n before the standard was final. Through all of this, the company had continued their standard for consistent delivery, high yields, and volume production. I am sure that many people at the company felt that Intel couldn’t lose…
I have readers from many of the companies whose history I cover, and many of you were present for time periods I cover. A few of you are mentioned by name in my articles. All corrections to the record are welcome; feel free to leave a comment.